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#535 – Efinix FPGAs with Sammy Cheung
Welcome Sammy Cheung, CEO of Efinix!
- Efinix makes FPGAs in a fabless model.
- They started in 2012, but really got started with their first product in 2017
- Co-founder is Tony Ngai (CTO), both he and Sammy used to work at Altera
- At first they were trying to make a higher growth company, to possibly get aquired quickly. In 2015, when Intel acquired Altera, there was a pause to all acquisition talks.
- Interestingly, Xilinx is an investor, as well as Samsung
- Building the first chip (the Trion) required Architecture, Software, IC design. All things have to work together.
- Licensing IP
- They ended up selling 1M units
- Does first chip have to be niche?
- ASSP
- Trion is big in Computer Vision (CV) and sensing. It has hardware interfaces for Cameras / MIPI interface
- Chip architecture also matters
- Many CV users wanted to put inferencing functions on board, especially because it’s fast and flexible.
- In traditional FPGAs, the routing switch is separate from the logic element. In the Efinix “Fine grain architecture”, it’s more closely coupled. See the image in this IEEE Spectrum article.
- Logic elements are more “equivalent” logic elements
- Trion on 40 nm Low Power (LP) process
- The soon-to-be released Titanium is different. It has an upgraded architecture (though it’s still XLR).
- Early users have seen a 4x improvement
- Sammy says these chips are meant as much more than a Bridge device (like a CPLD)
- Not doing a ton of IP internally, OK with pulling in other companies’ IP
- Other vendors are integrating Efinix FPGA silicon into SIPs, using Chiplet form factors.
- Simplified power bringup
- Because doing specific FPGAs to integrate with others
- Applications
- Reconfigurable accelerator
- Security
- Auto
- 4 mask sets for Trion, 3 for Titanium
- Titanium is on a 16 nm process node.
- These chips are not meant for server farms, but they’re also not chasing the low end.
- Features in the Titanium
- DSP is more complex than just a MAC block
- Targeting DSP blocks
- Soft IP offerings
- RISC V
- Next 5 years they expect more processor offerings
- Can run processor at 400-500 MHz
- “Domain Specific SOC”
- The Efinix RISCV offering is based off of the Vex RISC-V design, which won the 2018 Softcore contest, designed by Charles Papon
- Efinix hopes these chips will enable AI engineers
- Will Efinix use the open toolchain discussed on The Amp Hour regularly? No plans currently. Sammy contends that super competitve devices require vertical integration.
- Efinix has a tool called the Interface Designer
- Separate core from peripherals
- Sammy is excited about interesting future applications like automotive vision. The car is a “moving supercomputer”
- Q2 events showing Titanium and Dev kits are on the way. There will be parts out in the Summer, including the first released the TI60 out in Q3.
- What are their challenges looking forward? Not money or tech, but how the company will change as they grow